A microcontroller that moves every byte through the CPU does not stay efficient for long. Direct Memory Access is the mechanism that lets the AT32 stream data while the core sleeps or computes - and understanding it is what separates a design that hits its power and throughput targets from one that stalls.
Where DMA pays off
- ADC + DMA. Capture a continuous sensor stream into a circular buffer and process it in batches, instead of servicing an interrupt per sample.
- USART / SPI bulk transfer. Move frames in the background and wake the core only when a block is complete.
- Memory-to-memory. Copy and fill operations run without core involvement.
A minimal setup checklist
| Step | What to set | Why it matters |
|---|---|---|
| Channel pick | Dedicated channel per peripheral | Avoids stream conflicts |
| Buffer | Aligned, large enough | Prevents overrun and misalignment |
| Mode | Circular + double buffer | Continuous, gap-free capture |
| IRQ | Half + complete | Process one half while the other fills |
Mistakes that bite silently
The most dangerous DMA bugs are silent: a misaligned buffer, a missed half-transfer interrupt, or a shared channel collision produces wrong data rather than a fault. On parts with a cache, coherency between the cache and DMA memory must be handled explicitly. Validate the data, not just that the transfer "completed".
Target devices
The AT32F435, AT32F437, AT32F403A and AT32F407 are strong choices for data-intensive designs that lean on DMA. Send us your target device and quantity and we will quote with date codes so you can build and test the streaming path on real hardware. See the microcontroller range.
Frequently asked questions
What is DMA and why use it on an AT32?
Direct Memory Access moves data between peripherals and memory without involving the CPU for every byte. On an AT32 it lets the core stay asleep or do real work while the DMA controller streams ADC samples, USART bytes or memory blocks in the background, which is the key to low power and high throughput.
Which transfers are DMA best at?
Continuous ADC capture (for example a sensor sampled at fixed rate), UART or SPI bulk transfer, and memory-to-memory copies are the classic wins. Anything that is a steady stream of bytes is a candidate; anything that needs per-byte decisions usually is not.
What are the common DMA mistakes?
Buffer misalignment and insufficient size, forgetting to handle the half-transfer and transfer-complete interrupts for double buffering, channel conflicts when two peripherals share a stream, and leaving caching or coherency unhandled on parts with a data cache. Each of these causes silent data corruption rather than a clear error.
How many channels does AT32 have and how do I pick?
The AT32F4 family provides multiple DMA controllers and a dozen or more channels; the exact number depends on the sub-family. Assign each peripheral its own channel or stream where possible, and consult the reference manual's channel mapping table rather than assuming a free slot.
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