An RF power transistor is a temperamental device: its quiescent current wanders with temperature, its gate chemistry ages, its drain must never be applied before the bias condition is safe, and its linearity at the customer's antenna depends on all three. The bias controller — a DAC, an error amplifier and a current monitor working together — is the small circuit that turns a raw power die into a product. This article covers the application logic, the newer smart-bias technology, and how to build or buy the function for both imported and domestic transistors.
Application logic: what the bias loop actually does
Three jobs define the function. First, quiescent-current regulation: the controller senses PA drain current (or a mirror of it), compares against a setpoint and adjusts gate voltage so the transistor idles at the class of operation the linearity budget assumes. A LDMOS stage set to 50 mA at 25 °C may drift to 80 mA hot or 30 mA cold without the loop — and with it, both distortion and thermal reliability go out of spec. Second, sequencing: negative-bias-class devices (GaN HEMTs) require the gate bias before the drain voltage, or the channel conducts uncontrolled and the device dies; the sequencer enforces the order with hardware, not firmware hope. Third, fault protection: over-current latch, over-temperature foldback and VSWR-tolerant drain-current limiting keep a mismatched antenna from becoming a warranty claim. The power-device side of this story — the transistors themselves — is covered in our GaN/LDMOS power-device article, and the drain-feed regulator choice in the low-noise LDO article.
Datasheet and design parameters that decide success
- Gate-voltage range and resolution: GaN gates move hundreds of millivolts; LDMOS gates live at 2–5 V with milliamp-class adjustment authority — a DAC plus error amplifier must span the right range with sub-millivolt resolution.
- Current-sense accuracy and bandwidth: the loop's sense element (shunt plus amplifier) must resolve tens of milliamps without adding voltage drop to the drain feed.
- Loop stability across temperature: a quiescent loop that hunts at low current ruins the very linearity it exists to protect.
- Sequencing thresholds and timing: gate-before-drain delay, drain-ramp slew control and the fault thresholds that reset the sequence.
- Temperature compensation curve: many controllers trim the setpoint against a thermistor or a digital temperature readout such as the DS18B20.
- Protection behaviour: latch-off versus foldback versus auto-retry, chosen to match the service policy of the product.
New technology in bias control
The integrated generation has moved the function into dedicated parts: modern PA bias controllers combine the DAC, the error amplifier, the current mirror and the sequencer in one IC, exposing an I2C/SPI register map so the baseband MCU can command power class, monitor current and log faults. Alongside, digital predistortion-adjacent smart bias adjusts quiescent current with modulation depth and envelope statistics, cutting average drain current in bursty links; and envelope-tracking power management modulates the drain supply with the signal envelope for efficiency — raising the precision demands on the current monitor and the sequencing logic. For discrete or mixed-vendor builds, the function is fully constructible from standard parts: a DAC (MCP4725A0T), a precision amplifier (COS2387SRA), a current monitor (INA226AIDGSR) and a sequencing MCU (STM32F407VGT6) reproduce the integrated part's behaviour around any transistor, imported or domestic.
Domestic options: build-from-parts and families, with indicative cost
Two domestic paths are documented. The build-from-parts path uses the COSINE amplifier and LDO families stocked for exactly this purpose — the COS29302WU 3 A low-dropout regulator feeds the drain, the zero-drift amplifier closes the gate loop — giving full control of the control law for a few dollars of BOM. The family path: institute-affiliated and commercial domestic vendors document PA bias and drain-management circuits at family level for their own transistor ecosystems; where you adopt a domestic power transistor family, its vendor's controller family is the natural first candidate. Import anchors remain dedicated PA bias-controller ICs (for example the HMC980-class parts) and discrete DAC-plus-opamp builds.
Price figures below are indicative public-market reference ranges for moderate volumes, compiled from publicly observable listings. They fluctuate with the spot market, package option, grade (industrial, automotive, screened) and order quantity, and must not be read as a quotation. Ask us for a firm price on your exact part numbers and quantities.
| Function (imported anchor) | Example import part / class | Indicative import price (USD) | Domestic candidate | Indicative domestic price (USD) |
|---|---|---|---|---|
| Integrated PA bias controller with sequencer | HMC980-class dedicated controllers | 8.00 – 25.00 | Domestic controller families paired with domestic PA families (family level) | 5.00 – 15.00 |
| Gate-bias DAC | MCP4725A0T (Microchip) | 0.60 – 1.30 | Domestic I2C DAC family (family level) | 0.15 – 0.50 |
| Quiescent-loop error amplifier | OPA2387-class zero-drift amp | 1.20 – 2.80 | COS2387SRA (COSINE, in stock) | 0.25 – 0.70 |
| Drain current monitor | INA226AIDGSR (TI) | 1.20 – 2.50 | Domestic current-monitor family (see our current-sense article) | 0.30 – 1.00 |
| Drain-feed regulator | COS29302WU 3 A LDO | 0.80 – 2.00 | Same part, domestic supply | 0.50 – 1.20 |
| Sequencing and fault-logic MCU | STM32F407VGT6 | 4.00 – 7.00 | GD32F303CBT6 | 1.00 – 2.50 |
The economics favour the build-from-parts path for low and medium volume — the integrated import controller's premium buys integration, not physics. For high volume around a domestic transistor family, the vendor-controller path wins on sourcing simplicity.
Qualification flow
Characterise the transistor's quiescent current against gate voltage at −30, +25 and +70 °C; design the compensation curve from that data. Verify sequencing on a scope by killing supplies at random phases and confirming the drain never leads the bias. Run a 48-hour soak with current logging, then a mismatch sweep (VSWR 3:1 all phases) into a load tuner to confirm the protection behaves. Cross-check linearity before and after the loop is enabled — the bias controller should be invisible at the antenna, visible only on the reliability plot. Our watt-class driver-amplifier article covers the stages that sit between the bias board and the final PA.
Frequently asked questions
Why did my LDMOS PA's intermodulation drift after warm-up?
Quiescent current drift with temperature. Without a closed bias loop the operating class moves as the die heats, and intermodulation follows. Close the loop on drain current with temperature compensation.
What happens if drain voltage arrives before gate bias on a GaN PA?
On depletion-mode GaN HEMTs the channel conducts with no bias, so the device can self-destruct. Enforce gate-before-drain sequencing in hardware with defined thresholds.
Is a discrete DAC-plus-opamp bias loop good enough?
For most industrial and ISM PAs, yes: sub-millivolt gate resolution and a current monitor from standard parts meet the loop requirements at a fraction of an integrated controller's cost. Integrated parts win on register map, fault logging and sourcing simplicity.
Can I bias a domestic transistor with an imported controller's reference design?
Usually with rework of the voltage ranges and the compensation curve. Domestic PA families document their own controller pairs; otherwise the build-from-parts path avoids family lock-in entirely.
About us & trademarks: JTDZ Tech (Shenzhen Jingteng Electronics Technology Co., Ltd.) is an independent distributor of electronic components. We are not an authorised distributor or representative of the imported manufacturers named in this article. Manufacturer, brand and part names are used for identification purposes only; all trademarks remain the property of their respective owners. Cross-reference information in this article is based on publicly available sources, is subject to change, and is not a substitute for your own engineering validation. Always verify specifications against the manufacturer's datasheet before design-in or purchase.
